NXP Semiconductors /QN908XC /PINT /PMCFG

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Interpret as PMCFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NO_EFFECT)PROD_ENDPTS0 0 (NO_EFFECT)PROD_ENDPTS1 0 (NO_EFFECT)PROD_ENDPTS2 0 (NO_EFFECT)PROD_ENDPTS3 0 (NO_EFFECT)PROD_ENDPTS4 0 (NO_EFFECT)PROD_ENDPTS5 0 (NO_EFFECT)PROD_ENDPTS6 0 (CONSTANT_HIGH)CFG00 (CONSTANT_HIGH)CFG10 (CONSTANT_HIGH)CFG20 (CONSTANT_HIGH)CFG30 (CONSTANT_HIGH)CFG40 (CONSTANT_HIGH)CFG50 (CONSTANT_HIGH)CFG60 (CONSTANT_HIGH)CFG7

CFG3=CONSTANT_HIGH, PROD_ENDPTS2=NO_EFFECT, PROD_ENDPTS0=NO_EFFECT, PROD_ENDPTS3=NO_EFFECT, CFG2=CONSTANT_HIGH, CFG7=CONSTANT_HIGH, CFG5=CONSTANT_HIGH, CFG4=CONSTANT_HIGH, PROD_ENDPTS6=NO_EFFECT, PROD_ENDPTS4=NO_EFFECT, CFG6=CONSTANT_HIGH, PROD_ENDPTS5=NO_EFFECT, CFG0=CONSTANT_HIGH, CFG1=CONSTANT_HIGH, PROD_ENDPTS1=NO_EFFECT

Description

Pattern match interrupt bit slice configuration register

Fields

PROD_ENDPTS0

Determines whether slice 0 is an endpoint.

0 (NO_EFFECT): No effect. Slice 0 is not an endpoint.

1 (ENDPOINT): endpoint. Slice 0 is the endpoint of a product term (minterm). Pin interrupt 0 in the NVIC is raised if the minterm evaluates as true.

PROD_ENDPTS1

Determines whether slice 1 is an endpoint.

0 (NO_EFFECT): No effect. Slice 1 is not an endpoint.

1 (ENDPOINT): endpoint. Slice 1 is the endpoint of a product term (minterm). Pin interrupt 1 in the NVIC is raised if the minterm evaluates as true.

PROD_ENDPTS2

Determines whether slice 2 is an endpoint.

0 (NO_EFFECT): No effect. Slice 2 is not an endpoint.

1 (ENDPOINT): endpoint. Slice 2 is the endpoint of a product term (minterm). Pin interrupt 2 in the NVIC is raised if the minterm evaluates as true.

PROD_ENDPTS3

Determines whether slice 3 is an endpoint.

0 (NO_EFFECT): No effect. Slice 3 is not an endpoint.

1 (ENDPOINT): endpoint. Slice 3 is the endpoint of a product term (minterm). Pin interrupt 3 in the NVIC is raised if the minterm evaluates as true.

PROD_ENDPTS4

Determines whether slice 4 is an endpoint.

0 (NO_EFFECT): No effect. Slice 4 is not an endpoint.

1 (ENDPOINT): endpoint. Slice 4 is the endpoint of a product term (minterm). Pin interrupt 4 in the NVIC is raised if the minterm evaluates as true.

PROD_ENDPTS5

Determines whether slice 5 is an endpoint.

0 (NO_EFFECT): No effect. Slice 5 is not an endpoint.

1 (ENDPOINT): endpoint. Slice 5 is the endpoint of a product term (minterm). Pin interrupt 5 in the NVIC is raised if the minterm evaluates as true.

PROD_ENDPTS6

Determines whether slice 6 is an endpoint.

0 (NO_EFFECT): No effect. Slice 6 is not an endpoint.

1 (ENDPOINT): endpoint. Slice 6 is the endpoint of a product term (minterm). Pin interrupt 6 in the NVIC is raised if the minterm evaluates as true.

CFG0

Specifies the match contribution condition for bit slice 0.

0 (CONSTANT_HIGH): Constant HIGH. This bit slice always contributes to a product term match.

1 (STICKY_RISING_EDGE): Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

2 (STICKY_FALLING_EDGE): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

3 (STICKY_RISING_FALLING_EDGE): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

4 (HIGH_LEVEL): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.

5 (LOW_LEVEL): Low level. Match occurs when there is a low level on the specified input.

6 (CONSTANT_ZERO): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).

7 (EVENT): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.

CFG1

Specifies the match contribution condition for bit slice 1.

0 (CONSTANT_HIGH): Constant HIGH. This bit slice always contributes to a product term match.

1 (STICKY_RISING_EDGE): Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

2 (STICKY_FALLING_EDGE): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

3 (STICKY_RISING_FALLING_EDGE): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

4 (HIGH_LEVEL): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.

5 (LOW_LEVEL): Low level. Match occurs when there is a low level on the specified input.

6 (CONSTANT_ZERO): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).

7 (EVENT): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.

CFG2

Specifies the match contribution condition for bit slice 2.

0 (CONSTANT_HIGH): Constant HIGH. This bit slice always contributes to a product term match.

1 (STICKY_RISING_EDGE): Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

2 (STICKY_FALLING_EDGE): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

3 (STICKY_RISING_FALLING_EDGE): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

4 (HIGH_LEVEL): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.

5 (LOW_LEVEL): Low level. Match occurs when there is a low level on the specified input.

6 (CONSTANT_ZERO): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).

7 (EVENT): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.

CFG3

Specifies the match contribution condition for bit slice 3.

0 (CONSTANT_HIGH): Constant HIGH. This bit slice always contributes to a product term match.

1 (STICKY_RISING_EDGE): Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

2 (STICKY_FALLING_EDGE): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

3 (STICKY_RISING_FALLING_EDGE): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

4 (HIGH_LEVEL): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.

5 (LOW_LEVEL): Low level. Match occurs when there is a low level on the specified input.

6 (CONSTANT_ZERO): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).

7 (EVENT): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.

CFG4

Specifies the match contribution condition for bit slice 4.

0 (CONSTANT_HIGH): Constant HIGH. This bit slice always contributes to a product term match.

1 (STICKY_RISING_EDGE): Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

2 (STICKY_FALLING_EDGE): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

3 (STICKY_RISING_FALLING_EDGE): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

4 (HIGH_LEVEL): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.

5 (LOW_LEVEL): Low level. Match occurs when there is a low level on the specified input.

6 (CONSTANT_ZERO): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).

7 (EVENT): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.

CFG5

Specifies the match contribution condition for bit slice 5.

0 (CONSTANT_HIGH): Constant HIGH. This bit slice always contributes to a product term match.

1 (STICKY_RISING_EDGE): Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

2 (STICKY_FALLING_EDGE): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

3 (STICKY_RISING_FALLING_EDGE): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

4 (HIGH_LEVEL): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.

5 (LOW_LEVEL): Low level. Match occurs when there is a low level on the specified input.

6 (CONSTANT_ZERO): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).

7 (EVENT): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.

CFG6

Specifies the match contribution condition for bit slice 6.

0 (CONSTANT_HIGH): Constant HIGH. This bit slice always contributes to a product term match.

1 (STICKY_RISING_EDGE): Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

2 (STICKY_FALLING_EDGE): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

3 (STICKY_RISING_FALLING_EDGE): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

4 (HIGH_LEVEL): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.

5 (LOW_LEVEL): Low level. Match occurs when there is a low level on the specified input.

6 (CONSTANT_ZERO): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).

7 (EVENT): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.

CFG7

Specifies the match contribution condition for bit slice 7.

0 (CONSTANT_HIGH): Constant HIGH. This bit slice always contributes to a product term match.

1 (STICKY_RISING_EDGE): Sticky rising edge. Match occurs if a rising edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

2 (STICKY_FALLING_EDGE): Sticky falling edge. Match occurs if a falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

3 (STICKY_RISING_FALLING_EDGE): Sticky rising or falling edge. Match occurs if either a rising or falling edge on the specified input has occurred since the last time the edge detection for this bit slice was cleared. This bit is only cleared when the PMCFG or the PMSRC registers are written to.

4 (HIGH_LEVEL): High level. Match (for this bit slice) occurs when there is a high level on the input specified for this bit slice in the PMSRC register.

5 (LOW_LEVEL): Low level. Match occurs when there is a low level on the specified input.

6 (CONSTANT_ZERO): Constant 0. This bit slice never contributes to a match (should be used to disable any unused bit slices).

7 (EVENT): Event. Non-sticky rising or falling edge. Match occurs on an event - i.e. when either a rising or falling edge is first detected on the specified input (this is a non-sticky version of value 0x3) . This bit is cleared after one clock cycle.

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